Nagendra Krishnapura

Recent Publications

N. Krishnapura, P. Agarwal, H. S. Kotian, S. R. Dhariya and S. Maity, "Analysis and Design of Low-Noise Bandgap References," in IEEE Transactions on Circuits and Systems I: Regular Papers, Accepted. doi: 10.1109/TCSI.2026.3721814.
C. Bheemisetti et al., "A 7-bit 1.75-GS/s 6.9-fJ/conv.-step FoMw Loop-Unrolled Fully Asynchronous SAR ADC in 3-nm CMOS for a 224-Gb/s SerDes Receiver," in IEEE Journal of Solid-State Circuits, vol. 60, no. 4, pp. 1486-1499, April 2025. doi: 10.1109/JSSC.2024.3449115.
A. K. Unnam, P. Banerjee and N. Krishnapura, "An 81.5dB SNDR, 2.5 MHz Bandwidth Incremental Continuous-Time Delta-Sigma ADC in 180 nm CMOS," IEEE Solid-State Circuits Letters, vol. 7, pp. 191-194, 2024. doi: 10.1109/LSSC.2024.3412634.
A. Narayanan, A. Bhat and N. Krishnapura, "A 6 to 12-GHz Fractional-N Frequency Synthesizer With a Digital Technique to Counter Modulus-Dependent Feedback Divider Delays," in IEEE Journal of Solid-State Circuits, vol. 59, no. 9, pp. 2818-2830, Sept. 2024. doi: 10.1109/JSSC.2024.3373620.
P. Kumar and N. Krishnapura, "Signal-Strength Detector Based on CMOS-Inverter Supply Current," in IEEE Solid-State Circuits Letters, vol. 6, pp. 237-240, 2023. doi: 10.1109/LSSC.2023.3307361

Manoj Pal, Purnendu Bhattaru, Nagendra Krishnapura, and Vinay Nadig, "A 20 MHz Bandwidth, 100 dB Dynamic Range Logarithmic Detector with ±1 dB Log-Conformance Error," 2026 IEEE European Solid-State Electronics Research Conference (ESSERC), Palma de Mallorca, Spain, 2026, Accepted.
Abhishek Kumar and Nagendra Krishnapura, "A Novel Feed-Forward Calibration Technique for Spur Reduction in Low-Noise Compact mmWave SSPLLs with Switched-Capacitor Loop Filters," 2026 IEEE 69th International Midwest Symposium on Circuits and Systems (MWSCAS), Cincinnati, USA, 2026.
N. Krishnapura, "On Resistor Nonlinearity Modeling for Low-Distortion Analog Circuits," 2026 IEEE International Symposium on Circuits and Systems (ISCAS), Shanghai, China, 2026, pp. 1-5.
A. Senapati and N. Krishnapura, "Design Considerations for a Closed-loop Digital Class-D Audio Amplifier," 2025 IEEE International Symposium on Circuits and Systems (ISCAS), London, United Kingdom, 2025, pp. 1-5. doi: 10.1109/ISCAS56072.2025.11043416.
N. Krishnapura, "Analysis of Signal Transmission through Time-Varying Inductively Coupled Links," 2024 IEEE International Symposium on Circuits and Systems (ISCAS), Singapore, Singapore, 2024, pp. 1-5. doi: 10.1109/ISCAS58744.2024.10558377.

R. S. Ashwin Kumar and Nagendra Krishnapura, "Multi-channel Delta-Sigma Analog-to-Digital Converters Without Reset," 2023 IEEE Asia Pacific Conference On Circuits And Systems(APCCAS), 19-22 November 2023, Hyderabad, India.
Shanthi Pavan and Nagendra Krishnapura, "Linear Periodically Time-Varying Systems: Analysis and Applications," IEEE International Symposium on Circuits and Systems, 21-25 May 2023, Monterey, California, USA.
Saurabh Saxena and Nagendra Krishnapura, "Architecture and circuits for fractional-N clock synthesis in wireline/wireless applications," Full Day Tutorial at the 32nd International Conference on VLSI Design, 5-9 January 2019, New Delhi, India.
Saurabh Saxena and Nagendra Krishnapura, "High-Speed Serial Links: Architectures and Circuits for Clock and Data Recovery," Full Day Tutorial at the 31st International Conference on VLSI Design, 6-10 January 2018, Pune, India.
Shanthi Pavan and Nagendra Krishnapura, "Demystifying Time-Varying Systems," Half Day Tutorial at the 27th International Conference on VLSI Design, 4-8 January 2016, Kolkata, India.

Nagendra Krishnapura and Sumit Kumar, "Wideband Frequency Modulator System Using a Phase-Locked Loop (PLL)," Indian patent 597975, 26 December 2026.
Nagendra Krishnapura and Charishma Routhu, "A Phase-Locked Loop Circuit Assembly With Reduced Voltage Variation at Charge Pump Output," Indian patent 595994, 17 July 2026.
Aditya Narayanan and Nagendra Krishnapura, "System and method of mitigating divider delay variations in a fractional frequency synthesizer," Indian patent 572897, 29 October 2025.
Subha Sarkar, Rajat Agarwal, and Nagendra Krishnapura, "Nonlinearity Cancellation Circuit for Active Filters," US 12355411B2, 8 July 2025.
Abhishek Bhat and Nagendra Krishnapura, "Low phase noise quadrature oscillators," Indian patent 558513, 22 January 2025.