VLSI Data Conversion Circuits, Aug-Dec 2005: References

Handouts

• Pipelined A/D converters

References

Data converters

Links to the papers below should work from computers inside IIT. If they don't , visit http://ieeexplore.ieee.org/ and carry out an appropriate search)

ADC/DAC basics

• ADC and DAC glossary from Maxim.
• Principles of Data Conversion System Design Behzad Razavi, Wiley-IEEE, 1994.
• CMOS Integrated Analog-To-Digital and Digital-To-Analog Converters, Rudy J. Van Der Plassche, Kluwer Publishers, 2003
• Analog Integrated Circuit Design, David Johns and Ken Martin, John Wiley & Sons, 1997.

Flash A/D converters

• K. Nagaraj, D. A. Martin, M. Wolfe, R. Chattopadhyay, S. Pavan, J. Cancio, and T. R. Viswanathan, "A dual-mode 700-Msamples/s 6-bit 200-Msamples/s 7-bit a/d converter in a 0.25-µm digital CMOS process," IEEE Journal of Solid-State Circuits, vol. 35, pp. 1760 - 1768, December 2000. Discusses bootstrapped sample and hold, interleaved S/H, preamplifiers with offset correction.
• C. W. Mangelsdorf, "A 400-MHz input flash converter with error correction," IEEE Journal of Solid-State Circuits, vol. 25, pp. 184 - 191, February 1990. Discusses latch design, error correction using majority encoding.

Sample and Hold Circuits

• T. L. Brooks, D. H. Robertson, D. F. Kelly, A. Del Muro, and S. W. Harston, "A cascaded sigma-delta pipeline A/D converter with 1.25 MHz signal bandwidth and 89 dB SNR," IEEE Journal of Solid-State Circuits, vol. 32, pp. 1896 - 1906, December 1997.
• J. Steensgaard, "Bootstrapped low-voltage analog switches" ISCAS '99. Proceedings of the 1999 IEEE International Symposium on Circuits and Systems, 1999. Volume 2, pp. 29-32, June 1999.
• T. Baumheinrich, B. Prégardier, and U. Langmann, "A 1-GSample/s 10-b full Nyquist silicon bipolar track&hold IC," IEEE Journal of Solid-State Circuits, vol. 32, pp. 1951 - 1960, December 1997. A very high speed bipolar T/H with attention paid to all sources of error.

Latches-Metastability, examples of CMOS latches

• H. J. M. Veendrick, "The behaviour of flip-flops used as synchronizers and prediction of their failure rate," IEEE Journal of Solid-State Circuits, vol. 15, pp. 169 - 176, April 1980. Analysis of metastability.
• S. Limotyrakis, S. D. Kulchycki, D. Su, and B. A. Wooley, "A 150MS/s 8b 71mW time-interleaved ADC in 0.18µm CMOS," IEEE International Solid-State Circuits Conference, vol. XVII, pp. 258 - 259, February 2004.
• Y. Chiu, P. R. Gray, and B. Nikolic, "A 14-b 12-MS/s CMOS pipeline ADC with over 100-dB SFDR," IEEE Journal of Solid-State Circuits, vol. 39, pp. 2139 - 2151, December 2004.
• B. Min, P. Kim, F. W. Bowman III, D. M. Boisvert, and A. J. Aude, "A 69-mW 10-bit 80-MSample/s pipelined CMOS ADC," IEEE Journal of Solid-State Circuits, vol. 38, pp. 2031 - 2039, December 2003.
• J. Lin and B. Haroun, "An embedded 0.8 V/480 µW 6B/22 MHz flash ADC in 0.13-µm digital CMOS Process using a nonlinear double interpolation technique," IEEE Journal of Solid-State Circuits, vol. 37, pp. 1610 - 1617, December 2002.
• M. Choi and A. A. Abidi, "A 6-b 1.3-Gsample/s A/D converter in 0.35-µm CMOS," IEEE Journal of Solid-State Circuits, vol. 36, pp. 1847 - 1858, December 2001.

D/A converters

• Douglas Mercer; "A study of error sources in current steering digital-to-analog converters", 2004 IEEE Custom Integrated Circuits Conference, May 2004.
• Chi-Hung Lin, Klaas Bult; "A 10-b, 500-MSample/s CMOS DAC in 0.6 mm2", IEEE Journal of Solid-State Circuits, vol. 33, pp. 1948 - 1958, December 1998. An extremely well designed DAC which holds its performance up to the nyquist frequency.
• Bernd Schafferer, Richard Adams; "A 3V CMOS 400mW 14b 1.4GS/s DAC for multi-carrier applications", IEEE International Solid-State Circuits Conference, vol. XVII, pp. 360 - 361, February 2004.
• Yonghua Cong, Randall L. Geiger; "A 1.5-V 14-bit 100-MS/s self-calibrated DAC", IEEE Journal of Solid-State Circuits, vol. 38, pp. 2051 - 2060, December 2003.
• D. Wouter J. Groeneveld, Hans J. Schouwenaars, Henk A. H. Termeer, Cornelis A. A. Bastiaansen; "A self-calibration technique for monolithic high-resolution D/A converters", IEEE Journal of Solid-State Circuits, vol. 24, pp. 1517 - 1522, December 1989.
• Anne Van den Bosch, Marc A. F. Borremans, Michel S. J. Steyaert, Willy Sansen; "A 10-bit 1-GSample/s Nyquist current-steering CMOS D/A converter", IEEE Journal of Solid-State Circuits, vol. 36, pp. 315 - 324, March 2001.
• Jurgen Deveugele, Michiel Steyaert; "A 10b 250MS/s binary-weighted current-steering DAC", IEEE International Solid-State Circuits Conference, vol. XVII, pp. 362 - 363, February 2004.

Multistep and pipelined A/D converters

• J. Mulder, C. M. Ward, C. Lin, D. Kruse, J. R. Westra, M. Lugthart, E. Arslan, R. J. van de Plassche, K. Bult, and F. M. L. van der Goes, "A 21-mW 8-b 125-MSample/s ADC in 0.09-mm2 0.13-µm CMOS," IEEE Journal of Solid-State Circuits, vol. 39, pp. 2116 - 2125, December 2004. Subranging ADC-this technique is not discussed in our class. But the paper also discusses interpolation, offset cancellation, averaging, and pipelining
• B. Razavi and B. Wooley, "A 12-b 5-MSample/s two-step CMOS A/D converter", IEEE Journal of Solid State Circuits, vol. 27, no. 12, pp. 1667-1677, Dec. 1992.
• Petschacher et al., "A 10-b 75-MSPS subranging A/D converter with integrated sample and hold"IEEE Journal of Solid State Circuits, vol. 25, no. 6, pp. 1339-1346, Dec. 1990.
• S. Lewis et al., "A 10b 20-Msample/s analog-to-digital converter", IEEE Journal of Solid State Circuits, vol. 27, no. 3, pp. 351-358, Mar. 1992.
• B. Ginetti and P. Jespers, "A CMOS 13-b cyclic RSD A/D converter" IEEE Journal of Solid State Circuits, vol. 27, no. 7, pp. 957-965, Jul. 1992.

Analog circuit design

• Analog Integrated Circuit Design, David Johns and Ken Martin, John Wiley & Sons, 1997.
• Mixed Analog Digital VLSI Devices and Technology (An introduction), Y. Tsividis, World Scientific, New Jersey, 2002.
• Analysis and design of Analog Integrated Circuits, Gray, Hurst, Lewis, and Meyer, 4th Edition, John Wiley and Sons.
• Design of Analog Integrated Circuits and Systems, K. R. Laker and W.M.C. Sansen, McGraw-Hill, January 1994
• "Design of Analog CMOS Integrated Circuits", Behzad Razavi, McGraw-Hill,August 2000.
• Prof. Kinget's E6312 class page: http://www.cisl.columbia.edu/~ee6312