Analog Integrated Circuit Design, Jan-May 2007
Choose appropriate axes limits while plotting your results. The
area of interest should be clearly visible in the plot.
- Basic circuit analysis and component modeling: HW1 (due on 17 Jan 2007)
- Mismatch and Noise: HW2 (due on 5 Feb 2007)
- MOS amplifier stages: HW3 (due on 23 Feb 2007)
- MOS amplifier stages: HW4 (due on 7 Mar 2007)
- MOS opamps: Modeling and design: HW5 (due on 31 Mar 2007)
- Single ended MOS opamp design: HW6 (due on 8 Apr 2007)
- Design of differential opamp, biasing circuits: HW7 (due on 23 Apr 2007)
Submit all solutions by email as a single pdf file.
- You can use a
wordprocessor of your choice and convert the result to a pdf file.
- If you have multiple files, you can use pdftk to combine
them. This is installed under /usr/local in VLSI and TI
labs. Documentation can be found at
/usr/local/doc/pdftk/pdftk.1.html
- Another way to generate a pdf is to concatenate ps(postscript)
files containing all figures and text(use enscript to convert
text to ps) to a single ps file. Run ps2pdf on this file to get a pdf
file.
enscript -p p1.txt.ps p1.txt
enscript -p p2.txt.ps p2.txt
cat p1.txt.ps fig1.ps p2.txt.ps fig2.ps > out.ps
ps2pdf out.ps eexxxxxx_hw01.pdf
- Name your file with your id as eexxxxxx_hw01.pdf so that it is
easy for me to keep track of.
- Put your name and roll number on the first page. For joint
submissions, put all the names on the first page and submit a
single email.
- Regardless of the order in which you do the problems, rearrange
the solutions in the right order in the submission.
- N people submitting jointly will all receive equal credit equal
to 2-(N-1)/2 times the graded credit for the assignment.
- Joint work masquerading as individual submissions(a.k.a. copying)
will result in a zero on the assignments.
Tools
- Xcircuit is an open source tool for circuit netlisting. It is
also an excellent tool for drawing publication quality
circuits. Download the latest version of Xcircuit here. You might want to go
through the schematic
capture tutorial in order get familiar with the netlisting process. If
you use machines in FPGA/VLSI/IE labs, check to see if Xcircuit is
already installed.
- Eldo is a circuit simulator from Mentor Graphics. The Institute has
purchased 50 floating licenses of this simulator for class use. The
binaries are installed in the DCF as well as the FPGA and IE
labs. Feel free to copy them to your hostel Linux PCs. Eldo works like
any other SPICE, so if you are familiar with SPICE netlisting, it
should be smooth sailing. To simulate a circuit, create it in Xcircuit
and generate a netlist. Add the required analysis commands and include
the MOS model files to get going. An extensive Eldo user guide
(eldo_ur.pdf) should help point out the powerful features of the
simulator. This guide (and others) can be found in the
$anacad/documentation directory. To setup Eldo, see below.
- Xelga This is a waveform viewer from Mentor Graphics that
understands Eldo output. Use this to plot your simulation outputs. A
users guide (and others) can be found in the
$anacad/documentation directory.
- MOS models
Setup
- Log on to the department ftp/ssh server 10.7.0.1 (athreya). Copy the directory /pub/mentor to some convenient location (e.g. /tools) in your machine.
- Add the following line to your /etc/hosts file
10.65.0.45 moon.cc.iitm.ernet.in moon
- Add the following lines to your startup script in your home directory
For csh or tcsh: ~/.cshrc
# ANACAD BEGIN #########################
# ANACAD SOFTWARE Initialization
setenv anacad /tools/mentor # (change as necessary. It is /pub/mentor in DCF)
source $anacad/com/init_anacad
# ANACAD END #########################
setenv LM_LICENSE_FILE 1717@10.65.0.45
set path = ($anacad/bin $path)
For zsh/bash: ~/.profile or ~/.bashrc
# ANACAD BEGIN #########################
# ANACAD SOFTWARE Initialization
export anacad=/tools/mentor # (change as necessary. It is /pub/mentor in DCF)
source $anacad/com/init_anacad.ksh
# ANACAD END #########################
export LM_LICENSE_FILE=1717@10.65.0.45
export PATH=$anacad/bin:$PATH
For those who want to use the tool in DCF/FPGA Lab/IE Lab, follow the
same procedure except steps 1&2.
Troubleshooting
- If Eldo does not fire up : First make sure that the environment variables are properly set.
- If Eldo complains about licenses : check if your machine is able to reach the license server (moon.cc.iitm.ernet.in or 10.65.0.45). If moon is not reachable, contact your network administrator.
- If moon is reachable, but you are unable to run Eldo, run "lmstat -c 1717@moon" from your command line. If the result is that the license server is running, it means that your environment variables are not properly set. If the license server is dead, please contact Mr.S.K.Ramesh at the Computer Center (Phone 4980).
- If Eldo crashes complaining about the kernel version, add the
following line to .cshrc(and source it)
setenv LD_ASSUME_KERNEL 2.4.1
- Motivation; MOS device basics(1 week)
- Small signal equivalent circuit(0.5 week)
- Components available in an IC(0.5 week)
- Mismatch(0.5 week)
- Noise in MOS transistors, resistors(0.5 week)
- Single transistor stages-CS, CG, CD(1 week)
- Single transistor stages with resistive feedback-Emitter degeneration, Transimpedance(1 week)
- Differential amplifier(1.5 weeks)
- Multistage amplifiers(0.5 week)
- Negative feedback(1 week)
- Bandgap reference generator(1 week)
- IC layout and packaging(0.5 week)
- Bipolar ICs(1 week)
Caveat downloader: These are brief transcripts of the lectures. They are
not meant to be detailed descriptions as in a text book.
Overstrike means that there was no lecture on that day. No link means
that there no notes for that day (yet).