Description

Figure 1: Transmitter, channel, and the equalizer

Digital data at $f_s = 1\,\mbox{Gb/s}$ from a transmitter(Fig. 1) passes through a lowpass channel which attenuates some of the high frequencies of the signal. Additionally, some of the clock at $f_s=1\,\mbox{GHz}$ leaks to the data output.

Your job is to design an equalizing filter to boost the high frequencies of the signal around $f_s/2=500\,\mbox{MHz}$ and filter the clock feedthrough at $f_s=1\,\mbox{GHz}$. The filter is required to have a linear phase.

• For linear phase, start with a seventh order Bessel filter with a -3dB bandwidth of $f_s/2=500\,\mbox{MHz}$.
• Add a pair of complex conjugate zeros and a pair of equal and opposite real zeros to obtain a +3dB boost at $f_s/2=500\,\mbox{MHz}$ and 10dB attenuation at $f_s = 1\,\mbox{MHz}$.
• You can use any topology that strikes your fancy: opamp-RC or $g_m$-C; ladder or cascade; single ended or differential.
• The total capacitance used in your filter must be 2.xxpF where xx are the last 2 digits of your social security number.
• The dc gain of the filter must be 0dB.