High frequency continuous-time filters are used for noise removal and
pulse shaping in disk drives, transmitters for optical links etc. We
are investigating low power realizations of continuous-time
filters. We have also developed techniques for accurate measurement of
filter responses by de-embedding external couplings without the use of
expensive packages or equipment.
T. Laxminidhi, V. Prasadu and S. Pavan, “Widely Programmable High Frequency Active-RC Filters in CMOS Technology”,
IEEE Transactions on Circuits and Systems I : Regular Papers,(paper) to appear.
T. Laxminidhi, V. Prasadu and S. Pavan, “A Low Power 44-300
MHz Programmable Active-RC Filter in 0.18um CMOS”,
Proceedings of the Custom Integrated Circuits Conference, San Jose, September 2007.
(paper) S. Pavan and T. Laxminidhi, “Accurate Characterization of Integrated Continuous Time Filters”,
IEEE Journal of Solid State Circuits, August 2007.(paper) T. Laxminidhi and S. Pavan, “Efficient Design Centering of High Frequency Continuous Time Filters”,
IEEE Transactions on Circuits and Systems : Regular Papers, July 2007.(paper) T. Laxminidhi and S. Pavan, “Efficiently Design Centering High Frequency Integrated Continuous-time Filters”,
accepted for presentation at the IEEE International Symposium on Circuits and Systems, ISCAS, May 2007, New Orleans
S. Pavan and T.Laxminidhi, “ A Technique for Accurate Frequency Response Measurement of Integrated Continuous-Time Filters,” Proceedings of the
IEEE Custom Integrated Circuits Conference, CICC 2006, San Jose, September 2006.
(paper) S. Pavan and T.Laxminidhi, “ A 70-500
MHz Programmable CMOS Filter Compensated for MOS Nonquasistatic Effects,” Proceedings of the
IEEE European Solid State Circuits Conference, ESSCIRC 2006, Switzerland, September 2006.
(paper) N. Krishnapura and Y. Tsividis, “Micropower low-voltage analog filter in a digital CMOS process”, IEEE Journal of Solid State Circuits, vol. 38, no. 6, pp. 1063-1067, Jun. 2003. (paper)
Y. Tsividis, N. Krishnapura, Y. Palaskas, L. Toth, “Internally varying analog circuits minimize power dissipation” IEEE Circuits and Devices Magazine, vol. 19, no. 1, pp. 63-72, Jan. 2003. (paper)
D. Frey, Y. Tsividis, G. Efthivoulidis, and N. Krishnapura, “Syllabic-companding Log Domain Filters”, IEEE Transactions on Circuits and Systems II, vol 48, no. 4, pp. 329-339, Apr. 2001.(paper)
N. Krishnapura and Y. Tsividis, “A Micropower Log-Domain Filter Using Enhanced Lateral PNPs in a 0.25um CMOS Process”, 2001 VLSI Symposium on Circuits, pp. 179-182, Jun. 16 2001, Kyoto, Japan.(paper, slides)
N. Krishnapura and Y. Tsividis, “Dynamically Biased 1MHz Low-pass Filter with 61dB peak SNR and 112dB Input Range”, IEEE International Solid State Circuits Conference, pp. 360-361,465, slide supplement pp. 292-293,507, Feb. 4-7 2001, San Fransisco, USA.(paper, slides)
N. Krishnapura and Y. Tsividis, “Noise and Power Reduction in Filters Through the Use of Adjustable Biasing”, IEEE Journal of Solid State Circuits, vol. 36, no. 12, pp. 1912-1920, Dec. 2001. (paper)
N. Krishnapura, Y. Tsividis, and D. R. Frey, “Simplified Technique for Syllabic Companding in Log-domain Filters”, Electronics Letters, vol. 36, no. 15, pp. 1257-1259, 20th Jul. 2000.(paper)
S. Pavan and Y. Tsividis, “Time Scaled Electrical Networks - Properties and Applications in the Design of Programmable Analog Filters”, IEEE Transactions on Circuits and Systems - Analog and Digital Signal Processing, , Vol. 47, No.2, pp. 161-5, February 2000.(paper)
S. Pavan, Y. Tsividis and K. Nagaraj, “ Widely Programmable High Frequency Continuous Time Filters in Digital CMOS Technology”, IEEE Journal of Solid State Circuits,, Vol. 35, No.4, April 2000.(paper)
S. Pavan, Y. Tsividis and K. Nagaraj, “ A 60-350
MHz Programmable Analog Filter in a Digital CMOS Process”, Proceedings of the European Solid State Circuits Conference,, September 21-23 1999, Duisburg, Germany.(paper, slides)
S. Pavan, Y. Tsividis and K. Nagaraj, “Modeling of Accumulation MOS Capacitors for Analog Design in Digital VLSI Processes”, IEEE International Symposium on Circuits and Systems, vol. 1, pp. 143-146, May 31-June 3 1999, Orlando, Florida.(paper, slides )
N. Krishnapura, S. Pavan, C. Mathiazhagan, and B. Ramamurthi, “A Baseband Pulse Shaping Method for Gaussian Minimum Shift Keying”, IEEE International Symposium on Circuits and Systems, vol. 1, pp. 249-252, Jun 1-3 1998, Monterey, California. (paper, slides)
N. Krishnapura, Y. Tsividis, K. Nagaraj, and K. Suyama, “Switched Capacitor Companding Filters”, IEEE International Symposium on Circuits and Systems, vol. 1, pp. 480-483, Jun 1-3 1998, Monterey, California. (paper, slides)
S. Pavan and Y. Tsividis, “An Analytical Solution to a Class of Oscillators and its Application to Filter Tuning”, IEEE International Symposium on Circuits and Systems, vol. 1, pp. 480-483, Jun 1-3 1998, Monterey, California.(paper)
S. Pavan and Y. Tsividis, “An Analytical Solution to a Class of Oscillators and its Application to Filter Tuning”, IEEE Transactions on Circuits and Systems-I, vol. 45, no. 9, pp. 1242-1249, May 1998. (paper)