Many computations, including the effort involved in CAD tools such as event driven simulators, can be accelerated in hardware by exploiting the fact that the parallelism inherent in the computation can be exploited in hardware, in a way that cannot be achieved using single processor code in software. Some of the areas being considered for such acceleration include the event-driven simulation engines used for digital systems design and verification, and the computational core of numerical engines such as the SPICE circuit simulator.