Integrated Circuits and Systems group, IIT Madras

Low Power ASIC Implementation of a Two-dimensional Discrete Wavelet Transform CODEC for Still Image Processing

By Kavish Seth

Abstract

Digital transmission and storage of the still images with high resolution for multimedia applications require huge bandwidths and memory capacities. Compression of images is therefore essential to create an effective increase in the channel capacities of existing networks and brings down the storage demands to manageable levels. The ultimate goal of image compression is to reduce the transmission bit rate or storage space while maintaining acceptable image quality. The JPEG committee has recently released its new image-coding standard, JPEG 2000. The JPEG 2000 standard provides a set of features that are of importance to many high-end and emerging applications by taking the advantage of new technologies. JPEG 2000 also implements a new way of compressing image based on the wavelet transform, in contrast to the discrete cosine transform (DCT) used in original JPG standard.

All the conventional Two-Dimensional Discrete and Inverse Discrete Wavelet Transform (2-D DWT/IDWT) architectures assume zero-padding. While this results in smaller latency, the resulting coefficients cannot be used to obtain a better reconstruction. In order to obtain perfect reconstruction, a symmetric extension of the signal has to be used. The method based on symmetric extension is chosen for low bit rate coding as it gives improved performance. This is because the pixel intensities at opposite boundaries are vastly different and zero-padding of the signal may result in distortion at the boundaries. In the extension scheme, however, reflecting the first few samples symmetrically extends the leading edge of the signal. The training edge is similarly extended by the last few samples. The Non-expansive Symmetric Extension (NSE) Scheme is used to compute the 2-D DWT/IDWT. The advantage of using this scheme is that there is no increase in data storage requirement for the extension of signals.

In this work, the architectures and scheduling algorithms are proposed to compute the 2-D DWT/IDWT based on the NSE scheme. Power consumption is reduced at the architecture level by incorporating the following techniques, viz., Low Power Memory Data Scheduling (LPMDS) technique, Canonic Sign Digit (CSD) arithmetic, common sub-expression sharing technique, resource sharing and gray code addressing modes. Though these implementations are dedicated for the 9/7-tap filter banks proposed in JPEG 2000 draft and for the image block of size 32×32 pixels, the proposed architectures and algorithms are generalized and can be used for any length of filter banks, any size of images and any level of transform. Such 2-D DWT codecs are particularly useful in applications such as wireless Internet, laptop computers and digital still camera, in which picture quality can be traded off for reduced power consumption.