Integrated Circuits and Systems group, IIT Madras

EE5310: Analog Electronic Circuits/EE3002: Analog Circuits(Aug.-Nov. 2014)

Instructors

Classrooms

  • ESB106: Roll numbers ending in 3, 6, 9
  • CRC101: All others

The introductory class for all students will be in CRC101 on Wednesday, 30th July 2014.

Schedule

E slot(Tu 11-12; W 10-11; Th 8-9; Fr 2-3)

Course page on moodle

Registered students can login and see the course page at https://courses.iitm.ac.in/. Resources, tutorials, exam schedules, discussion forum etc. can be accessed from the moodle page.

Teaching Assistants

Login to moodle at https://courses.iitm.ac.in/ to post questions and contact TAs and faculty.

Evaluation

There will be four quizzes. These will count for 50-60% of the grade and the end semester exam for the remaining 40%. Biweekly tutorials will count for up to 10% of the grade.

Recorded lectures

The recorded lectures are available here. You can also find lectures from previous years at the same link.

Tutorials

Problem sets will be posted below. You are expected to solve them on your own. You can approach the teaching assistants for clarifications and help. You should work each one before the corresponding dates given below. (The dates below are only tentative ones and can be changed at any time)

Syllabus

  • Nonlinear one-port and two-port circuits; Large signal and small signal incremental analysis; Incremental y parameters for obtaining gain; nMOS transistor;
  • Common source amplifier; biasing; ac coupling the signal;
  • Negative feedback amplifiers with one, two, or more poles in feedback; Loop gain and stability criteria; Phase margin; Dominant pole frequency compensation; Pole splitting;
  • Sensitivity to MOS parameters; Biasing a MOS transistor at a given current; Current mirror bias; Drain feedback bias; Source current bias; Using resistors instad of current sources;
  • Controlled sources using a transistor—common drain and common gate amplifiers;
  • pMOS transistor; Converting nMOS transistors to pMOS; Common source amplifier with an active load; CMOS inverter; Biasing in the high gain region
  • Differential pair; Half circuits; Single stage opamp; Two stage opamp;
  • High frequency model of a MOS transistor; Common source amplifier frequency response; Pole splitting; Common drain and common gate amplifier frequency responses;
  • Bipolar transistors; Elementary amplifier stages using bipolar transistors;

References

Pre-requisites

Attendance

Attendance will be strictly enforced and those falling short will not be permitted to write the end sem exam. TAs will go around the room taking attendance at the beginning of the class. If you are more than 5 min. late, please do not enter the classroom.