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Subha Sarkar

From: MNNIT Allahabad; To: Texas Instruments, Bangalore)

Conference Publications

Patents

Thesis

Title: Analysis and Design of Ultra Low Distortion Amplifiers, High-Q Bandpass Filters, and Sinusoidal Oscillators for Testing High-Resolution ADCS

The continued and growing demand for high-resolution precision ADCs has led to rising demand for testing hardware that can characterize multiple ADCs simultaneously in a small form factor and cost-efficient way. Currently, the sine wave generators have a very large form factor and are expensive; therefore, scalability to support multiple measurements is difficult. Discrete implementation suffers from mismatch, which can impact HD2. Therefore, this work explores the design of a very low distortion filter and oscillator in an integrated circuit form factor that can use as the stimulus.

To measure the distortion of high-resolution ADCs (18-20 bit), it is required to use a source having distortion better than or equal to −140dBc. Otherwise, the distortion of the DUT is overshadowed by the source distortion. DAC-based function generators have high-frequency stability. However, these sources have distortion levels near −80dB. The idea is to use a bandpass filter to suppress the harmonics of a −80dB sinusoid to −140dB level and use it as the source. Another possibility to generate −140dB THD sinusoid is by using an analog oscillator. In the case of an analog oscillator, the frequency stability is not as good as in a DAC-based sinusoidal generator. However, the on-chip power and area requirements are low.

A fully differential Tow-Thomas biquad filter is used to implement the bandpass filter because of its simplicity. Quantitative analysis of nonlinearity due to the amplifier, resistor, and capacitor is documented in detail. A two-stage fully-differential Miller (Ahuja) compensated opamp is designed to implement the filter. It was found that the output stage conductance and input stage transconductance were major sources of distortion. A regulated cascode structure is used to suppress the output stage distortion. Outside the amplifier, it was found that the capacitors are the major source of distortion. A novel nonlinearity cancellation architecture is discussed to cancel the capacitor’s nonlinearity to achieve better than −145dB of distortion.

The improved bandpass filter is used to make an oscillator that can generate very low distortion (−140dB) sine waves at 1kHz and 10kHz. Apart from the bandpass filter, an amplitude stabilization loop controls the amplitude. The other distortion source is the intermodulation distortion due to the amplitude stabilization loop’s ripple modulating the bandpass core’s fundamental signal. Therefore the loop filter is designed to suppress the ripple without disturbing the stability. Analysis of the loop stability is also discussed in detail. The amplitude accuracy is also improved by incorporating a pole at zero.

The chip is implemented using 0.6µm CMOS technology from Texas Instruments. A single-stage filter (including the nonlinearity cancellation circuit) consumes 4.2mA of current from a 5.6V of supply. Each filter stage is implemented with Q=7, providing −20dB suppression of HD2 and −27dB suppression of HD3. The THD achieved is −143dB at 1kHz and −142dB at 10kHz. Such distortion levels at 10Vppd signal enable us to measure the linearity of 20-bit ADCs.

In this work, the achieved THD is lowest among all the integrated circuit implementations by a significant margin of > +25dB with nearly the same power consumption. There is some noise penalty because of the noise cancellation circuit as well.