Site menu:
Praveen Kumar Varma
(From: Vellore Institute of Technology; To: Analog Devices, Bangalore)
Thesis
Title: Small Signal Modelling and Analysis of Adaptive ON-Time Architecture for a Buck Converter
KEYWORDS: Switching regulators, Adaptive on-time (AOT) architecture, multi-phase voltage regulators, Current share loop.
Voltage regulators are required to maintain a steady supply voltage even in the presence of variations at the input or load. Voltage regulators can be realized using switching regulators or linear regulators. Switching regulators are much more efficient than linear regulators. Among switching regulators, variable frequency architecture have very good response to input and load transients. In this work we focus on the adaptive on-time(AOT) architecture for buck converters. Though the AOT architecture was proposed some time ago, to the best of our knowledge, there are limited analytical results to analyze the architecture. In this work we find the small signal model and then use the model to analyze the bandwidth of the architecture.
To get the optimum bandwidth for a buck converter with AOT architecture feedback, we need to understand how different components affect the bandwidth. Then the component values can be chosen for optimum bandwidth. One of the possible ways of analyzing bandwidth is to find the loop gain and then understand how different components affect the unity loop gain frequency. However, in an AOT architecture there are strongly nonlinear elements in the feedback path. So we use describing function analysis to find the transfer function instead and the 3 dB frequency of this transfer function gives us the bandwidth directly. So a small signal model using the describing function analysis is derived. Using this model, the effect of circuit components on the bandwidth is analyzed and guidelines are given to choose the optimum component values.
For large load currents, we use multi-phase regulators. Multi-phase regulators operate similarly to single-phase regulators, but include additional feedback loops to ensure equal sharing of load currents among the phases. Again, a small signal model for multi phase case is derived, using similar analysis as single phase case. Using the model obtained the bandwidth dependence on the circuit components are analyzed and guidelines are given to get optimum bandwidth. We also analyze how the current share loop affects the voltage regulation. We derive criteria to make sure that voltage regulation is not affected by the extra loop.