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Charishma Routhu
(From: Vasireddy Venkatadri Institute of Technology, Guntur; To: Samsung Semiconductor, Bangalore)
Patents
- Nagendra Krishnapura and Charishma Routhu, "A Phase-Locked Loop Circuit Assembly With Reduced Voltage Variation at Charge Pump Output," Indian patent 595994, 17 July 2026.
Thesis
Title: Performance Enhancement of a Fractional-N Phase-Locked Loop
This thesis presents the design and implementation of a switched-capacitor level shifter, designed for seamless integration with any conventional PLL that employs a passive loop filter.
Phase-locked loops (PLLs) employing LC voltage-controlled oscillators (VCOs) achieve frequency tuning by varying the capacitance in the oscillator core. In wide tuning range applications, this often demands a high VCO gain (Kvco), which increases the PLL’s sensitivity to charge pump and loop filter noise, and requires a larger loop filter area to maintain loop stability. A lower VCO gain is therefore desirable, but achieving this typically requires expanding the VCO control voltage range, something that conflicts with the swing limits of conventional charge pumps.
In standard PLL architectures, the charge pump operates linearly only over a limited voltage window, typically with 0.2 V away from each supply rail, resulting in a low swing, particularly with low supply voltages, which restricts the usable control voltage range and consequently forces a higher Kvco. To overcome this, we propose a switched-capacitor level shifter that fixes the charge pump output at half the supply voltage, thereby enabling the control voltage to span the full supply range or even more while keeping the charge pump within its optimal linear range.
The level shifter is placed between the charge pump and loop filter, preserving charge pump linearity without compromising loop dynamics. By maintaining a constant output voltage for the charge pump, the proposed technique reduces current mismatch and enhances noise performance by improving gate overdrive in current sources allowing for lower transconductance at the same current. This proposed solution not only enables a 50% reduction in VCO gain but also contributes to lower phase noise, making it a promising solution for high-performance wideband synthesizers.