Table of Contents

EE6324: Phase-Locked Loops(Aug.-Nov. 2019)

Instructor

Classroom

Schedule

D slot(Mo 11-12; Tu 10-11; We 9-10; Th 12-1)

Course page on moodle

Registered students can login and see the course page at https://courses.iitm.ac.in/. Resources, tutorials, exam schedules, discussion forum etc. can be accessed from the moodle page.

Teaching Assistants

Login to moodle at https://courses.iitm.ac.in/ to post questions and contact faculty.

Evaluation

Recorded lectures

The recorded lectures are available here. You can also find lectures from previous years at the same link. The NPTEL online course Analog Circuits also covers a portion of the material.

Assignments

Assignments will be posted below. You are expected to solve them on your own. You should submit each one by 09:00AM of the due date mentioned. Copying will carry strict penalties.

Course contents

Topics include analog and digital integer-N phase-locked loops (PLLs). Building blocks include phase/frequency detectors, charge-pump, LC/ring-oscillators, multi-modulus frequency dividers, active/passive loop-filter, etc.

Objectives

To develop intuition behind frequency synthesizer design, learning mathematical basis behind operation, and realizing PLLs at architecture and transistor level.

References

Pre-requisites

Attendance

Attendance will be strictly enforced.