An oscillator can be constructed using an integrator and a schmitt trigger in a feedback loop such that when the output of the integrator crosses the threshold of the schmitt trigger, the direction of integration is reversed. There are many oscillator topologies based on this principle and in this experiment you'll study one of them.

The figure above shows an oscillator using an opamp based integrator(OPA₁, R, C) and a non-inverting schmitt trigger(OPA₂, R₁, aR₁). The oscillation frequency depends on hystereses width of the schmitt trigger and rate of integration of the oscillator.

• Calculate the expression for the oscillation frequency and amplitude at OPA₁ output.
• Design an oscillator with a frequency of 1kHz. Choose the hysteresis width to be 10 to 20% of the opamp's peak to peak swing limit. Build and demonstrate the oscillator.

To make a voltage controlled oscillator, the rate of integration needs to be controlled by a voltage. The above circuit shows a possibility to do that. The schmitt trigger has to be inverting type due to additional inversion introduced by Q₁. (V_ctl/2 can be derived using a resistive divider. D₁ protects the base-emitter juction of Q₁ from breakdown when OPA₂ swings negative.)

• Analyze the circuit assuming that Q₁ behaves like an ideal switch.
• Design the circuit for a frequency range of 1-1.5kHz for a control voltage range of 4-6V. Choose the hysteresis width to be 10 to 20% of the opamp's peak to peak swing limit. Build and demonstrate the oscillator. Measure the frequency vs. control voltage characteristics. Does it follow the predicted relationship?
• Change R or C to increase the frequency range to 10-15kHz for the same control voltage range as above. Measure the frequency vs. control voltage characteristics. Does it follow the predicted relationship? Is the f_osc vs. V_ctl characteristic linear? If not, explain the reasons and predict the deviation. (Hint: Opamp outputs cannot change faster than the slew rate; See the integrator output and the schmitt trigger output simultaneously on an oscilloscope)

• The transistor Q₁ is not an ideal switch. It has a saturation voltage of about 0.2V and affects the duty cycle and control linearity. How would you compensate for this? (You cannot assume an exact value for V_sat. It varies with temperature, for instance. You can assume that matched transistors are available.)
• How will you compensate for the last problem described in the above section?